/******************************************************************************
 * @Filename     : adc.h
 *
 * @Version      : V2.0
 * @Subversion   : $
 * @Last modified: 04/28/2020 15:54:20
 * @Modified by  : Chen Bo
 *
 * @Brief        : ADC driver header file
 *
 * Copyright (C) 2020 SKYRELAY Technology co.,Ltd All rights reserved.
 *****************************************************************************/

#ifndef __RC2412_ADC_H__
#define __RC2412_ADC_H__

#ifdef __cplusplus
extern "C"
{
#endif

#include <stdint.h>
#include "../../Device/SkyRelay/RC2412/Include/rc2412.h"
#include "../../periph_def/rc2412_adc_def.h"

#define ADC_EN_Msk (0)

#define IN0_CHANNEL             0
#define IN1_CHANNEL             1
#define IN2_CHANNEL             2
#define IN3_CHANNEL             3
#define IN4_CHANNEL             4
#define IN5_CHANNEL             5
#define IN6_CHANNEL             6
#define IN7_CHANNEL             7
#define IN8_CHANNEL             8
#define IN9_CHANNEL             9
#define IN10_CHANNEL            10
#define IN11_CHANNEL            11
#define IN12_CHANNEL            12
#define IN13_CHANNEL            13
#define VBAT_CHANNEL            14
#define CURRENT_CHANNEL         15

#define ADC_REF_MAX             0x528
#define ADC_REF_MIN             0x438

//Error Code
#define ADC_INVALID_PARA        0xA101
#define ADC_REF_ERR             0xA102
#define ADC_TEMP_ERR            0xA103

#define ADC_TRIGGER         ( ADC->ADC_TRIG |= ADCTRIG_Msk )         //Trigger adc sample once
#define ADC_GET_EOC_FLG     ( ADC->ADC_CON0 & ADIRQ_Msk ? 1 : 0 )    //Check end of conversion flag
#define ADC_CLR_EOC_FLG     ( ADC->ADC_CON0 |= ADIRQ_Msk        )    //Clear end of conversion flag
#define ADC_ENABLE          ( SYSC->CLK_EN |= ADC_EN_Msk        )    //ADC clock enable
#define ADC_DISABLE         ( SYSC->CLK_EN &= ~ADC_EN_Msk       )    //ADC clock disable
#define ADC_PON             ( ADC->ADC_CON0 |= ADEN_Msk         )    //ADC analog power on
#define ADC_POD             ( ADC->ADC_CON0 &= ~ADEN_Msk        )    //ADC analog power down
#define ADC_INT_ENABLE      ( ADC->ADC_CON0 |= ADIE_Msk         )    //ADC intr enable
#define ADC_INT_DISABLE     ( ADC->ADC_CON0 &= ~ADIE_Msk        )    //ADC intr disable
#define ADC_GET_RESULT      ( ADC->ADC_DATA                     )    //Get ADC result
#define ADC_SINGLE_MODE     ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMOD_Msk) | ( 0 << ADMOD_0_Pos) )  //adc select singal mode
#define ADC_REPEAT_MODE     ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMOD_Msk) | ( 1 << ADMOD_0_Pos) )  //adc select repeat mode
#define ADC_SINGLE_SCAN     ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMOD_Msk) | ( 2 << ADMOD_0_Pos) )  //adc select singal scan mode
#define ADC_REPEAT_SCAN     ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMOD_Msk) | ( 3 << ADMOD_0_Pos) )  //adc select repeat scan mode
#define ADC_SAMP_4CLK       ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADSAMP_Msk) | (0 << ADSAMP_0_Pos) )
#define ADC_SAMP_5CLK       ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADSAMP_Msk) | (1 << ADSAMP_0_Pos) )
#define ADC_SAMP_6CLK       ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADSAMP_Msk) | (2 << ADSAMP_0_Pos) )
#define ADC_SAMP_7CLK       ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADSAMP_Msk) | (3 << ADSAMP_0_Pos) )
#define ADC_SEL_VBAT_CH     ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMUX_Msk) | (VBAT_CHANNEL << ADMUX_0_Pos) )   //adc select VBAT source
#define ADC_SEL_CURRENT_CH  ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMUX_Msk) | (CURRENT_CHANNEL << ADMUX_0_Pos) )   //adc select current source
#define ADC_SEL_CHANNEL(u8Channel)  ( ADC->ADC_CON0 = (ADC->ADC_CON0 & ~ADMUX_Msk) | (u8Channel << ADMUX_0_Pos) )   //adc select channel
#define ADC_SET_SCAN(u8Start, u8End)    ( ADC->ADC_CON0 = (u8Start << ADSCANS_0_Pos) | (u8End << ADSCANE_0_Pos) )

uint32_t Caliber_ADC_Ref(uint32_t u32InfoAddr);
uint32_t Get_ADC_Ref(uint32_t u32InfoAddr);
uint32_t adc_Get_Voltage(uint32_t u32Vref, uint8_t u8Channel);

#ifdef __cplusplus
}
#endif

#endif

/*** (C) COPYRIGHT 2020 SKYRELAY Technology co.,Ltd ***/
